The intended research activities will be carried out in the following four phases:
PHASE I. Design constraints and KPIs
In phase I, we identify, for each block,
- the design constraints from Ubilite and TSMC (commonly through the DRC in the design environment CADENCE)
- the KPIs
- the common topologies
Phase III. Implementation of the Optimization Algorithm
The proposed solution methodology will employ classical optimization algorithms where the design constraints will be imposed as constraints for accepting or rejecting a sample design as well limits on the considered ranges of design parameters. The objective function will be synthesized in terms of KPIs.
Phase IV.
Building the Dictionary and subsequent ML Driven Automated Design of a selected component (the inductor) as a starting stage for our longer-term plan for the next 5 years, in which all other blocks will be included.
